The present disclosure generally relates to a semiconductor device, and more specifically, to a semiconductor device having reduced back channel leakage.
Various conventional methods exist for reducing leakage current in the back gate channel of semiconductor devices fabricated on Semiconductor-on-Insulator (SOI) wafers. One technique referred to as “well implantation,” applies an excessive amount of doped impurity such as boron for nFET and arsenic or phosphorus for pFET at specific regions of the back gate channel before forming the gate stack. Another technique referred to as “halo implantation,” applies an excessive amount of doped impurity at specific regions of the back gate channel after performing a gate etching procedure.
These doped impurity atoms such as boron, however, may have a high diffusivity in semiconductor materials, such as silicon and diffuse to all place during thermal anneal in normal silicon process flow. As SOI thickness scaling continues to become thinner, it is more difficult to keep a retrograded doping profile, i.e., providing a higher doping concentration at the back channel region while maintaining a lower doping concentration at the surface channel region near front transistor gate. The lack of doping profile control raises the threshold voltage of the transistors, i.e., the front gate Vt, and degrades drive current which results in low device performance. It may be desirable to locate higher doping at the back channel region to suppress back channel leakage without realizing excessive diffusion at the front surface and without excessively increasing the transistor threshold voltage.
A leakage path typically forms at corners of the back gate channel. The leakage path causes a reduction in the voltage threshold at corresponding regions of the back gate channel, e.g., the corner of the back gate channel. As a result, the voltage threshold at the back gate channel may decrease. As the voltage threshold at the back gate channel decreases, the back gate channel may realize a partially conductive state, i.e., a parasitic gating phenomenon, thereby causing current to leak from the back gate channel via the leakage path and contribute a significant portion of leakage between the source and drain. Accordingly, operational characteristics of semiconductor devices may be controlled by reducing the occurrence of parasitic gating phenomenon.